The @MATEC Archives

Volume 1, Number 2 Copper Interconnects
David Hata, Portland Community College
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 "Fulfilling a dream of several decades, IBM has introduced a technology that permits chip makers to use copper wires, rather than the traditional aluminum interconnects, to link transistors in chips," begins an article in a recent issue of IBM Research magazine (Number 4, 1997). Let’s briefly examine why this breakthrough in semiconductor manufacturing is key to future generations of semiconductor products.

Copper, when used as the interconnect material linking individual transistors in an integrated circuit, has significant advantages over aluminum and will have to replace aluminum as line width shrink below 0.25 microns. First, copper is a better conductor of electricity. Better conduction results in faster operating speeds and lower operating voltages. The IBM articles cites that a 40% reduction in the resistance of the interconnect material can result in increases in speed of 15% and in the number of transistors on a die to 150 million to 200 million.

Another advantage of copper interconnects is a reduction in electromigration, that is, the diffusion of metal atoms caused by high current densities in the conductive paths. The electric field and heating due to high current densities sets up a gradient along the lead and the mobile metal atoms move or migrate along the field. This causes leads to thin and ultimately open. Past practice has used alloys of aluminum and copper to moderate the effects of electromigration in aluminum interconnects. The use of copper as the main interconnect material will eliminate the need for alloying.

Copper’s success did not come overnight. In the IBM Research article, IBM Fellow Lubomyr Romankiw states, "Copper was considered to be a killer to semiconductor devices. The conventional wisdom was to stay as far away from copper as you could." Here Romankiw refers to copper’s ability to diffuse through silicon dioxide insulating layers into the silicon substrate where it then changes the electrical properties of the silicon in such a way as to prevent the transistors from working.

Major hurdles standing in the way of copper interconnect technology include how to deposit copper on the surface of the wafer, how to create diffusion barriers to prevent poisoning of the silicon, and how to pattern the copper layer. Deposition of copper is achieved through electrolytic plating, a process that has been rarely used in semiconductor manufacturing. In electrolytic plating, the wafer become the negative terminal of a power supply in an electrochemical "bath" containing copper ions and copper ions are deposited on the surface of the wafer.

Diffusion barriers keep the high-conductivity copper from diffusing into the dielectric layers. Barrier layer materials being studied include titanium nitride, tantalum nitride, tantalum-silicon-nitride, and cobalt tungsten.

Patterning of the copper uses what is called the "dual-damascene" process. In conventional process flows, a metal layer is first deposited and then patterned by etching away unwanted metal, leaving the desired pattern. An insulating layer is then deposited and excess insulator material is removed by polishing. The dual-damascene, on the other hand, first forms the metal pattern by etching the insulating layer. Then the metal is deposited and the excess metal removed by polishing. This new process flow requires one fewer metal deposition and one fewer polishing steps per metal layer.

IBM, Motorola, and other semiconductor companies as well as SEMATECH are working with semiconductor equipment suppliers to move copper technology from the research lab to production, but the real story behind copper’s eminent success are the people that pursued the dream of copper interconnects, those individuals who challenged conventional wisdom to produce unconventional results, opening the door to a new round of technological advances in the semiconductor industry.

For more information about copper interconnect technology, see: